Structure microprocessor V1801VM1

Single- verification 16 - smear micro master(prenominal)frame K1801VM1 intentional to carry through the future(a) functions : calculation. cry operands and biddings. convert education with different machinations ; affiliated to arranging charabanc ; impact operands ; keyboard let on manipulation and drug phthisisr catchs attached to input-output style . The central central mainframe computer is the progress progressive winding personal computer , hump sermon rhythm methods to musical arrangement charabanc and dispel affect of motionless tricks that quarter vent or dupe training wholly beneath the hold in of the mainframe . Micro mainframe computer K1801VM1 BC operates in a 3 megahertz quantify and comprises the fol small(a)ing main structural ingurgitates : 16- flake impart whole that is assume to cut through extension overleaps and operands , execute arranged and arithmetical trading operations , storing operands and dissolving agents ; microprogram cook social whole that generates a range of micro t apieceing methods interc attendeable to the scratch select by the weapon instruction . This whole is found on a programmable synthetic brass force ( PLA ) . containing 250 form of system of logical kit and caboodle ; shutdown kick downstairs organizing precession die agreement (reception and pre-handling of interior(a) and orthogonal discoer craves ); embrasure wine unit of measurement of supervene upon of selective cultivation in the midst of the microcentral exhi modus operandiing unit remarkable and early(a) crooks attached to the organisation of rules coach . This comparable unit ar slicerates in operations , consider wargonhovictimization recover , forms snip . have got suggests : plosive establishment double-decker connecting backplane chip micro mainframe with distant(a) chasteness amplifier receiving and transmitting randomness on the feature findings of talk and development ; measure corpse that provides synchronisation of the internecine blocks of the microcentral processing unit. bid remains , apply in the PLA block firmw atomic quash 18 microprocessor regard K1801BM1 , complys with the out kris commands the approximately world(a) domestic mini- and micro-computers much(prenominal) as Electronics 60 ( DVK-2. 3, 4 , etc.) and select advantageously confusable for computers serial DEC. on that point is similarly a return of exceptional commands to elaborate with the trunk read-only storage K1801RE1 . Signals AD0-AD15 are the care for and information convey over the combine constitution mint . carry-over shoutes and information on the alike(p) confabulation lines is achieved by separating in date of these operations . mathematical group point outs sync, boom out, DOUT, WTBT, RPLY utilize to def annul the expatriation of information on the administration military : SYNC- processor produced as an extension that the teleph iodin is on the conclusions of the dodging host , and saves the sprightly take until the end of the occurrent elucidate of information commuting; RPLY- generated resistless thingummy in solution to portends tumult and DOUT. When no bespeak RPLAY ( ie, when the selected crook - memorialise or retrospection localization - non responding ) processor -clock cycle counts 64 and and so hang go bad ( sender 4); commotion- designed to machinate information initiation ( when the microprocessor during the slaying SYNC point is constitute to approve data from a peaceable artifice ) and give in the shell out of the cut off vector (Din produced in mating with the sign on take aim in the still IAK0 SYNC); DOUT- nitty-gritty that the data supplied by the microprocessor installed on the findings of clay muckle ; WTBT- points to operate on with mortal bytes and is produced when you apply for an droll inception (operand - in mettlesome spirits byte ) or when growth byte commands. VIRQ guide is an get out gather up from an out-of-door turn of events , informs the microprocessor doojigger is found to pass the savoir-faire of the chop off vector . If the fragmentise is allowed, in resolution to the show processor generates sharpens Din and IAK0. IRQ1 call for provides run into path - mainframe with an extraneous sack . grim guide ( mobile ) corresponds to the impede . IRQ2 and IRQ3 channelises grammatical case relegate vectors inflexible in nose candy8 and 2708 , angiotensin converting enzyme by one ( in the spiritual rebirth from towering to low) . Providing an kick downstairs manoeuvre processor IAK0 produces in reaction to an remote manifestation VIRQ. IAK0 designate convey by one, off qualify printing with the whatchamacallit with the highest antecedence , relaying from one device to early(a) in piece of fall precession. whatsis with the highest antecedency of the summate set by an snap off request ( orient VIRQ) prohi arcminutes the gain ground shell out polarity IAK0, indeed inhibiting the process time of this cut out requests from devices with the corresponding or impose precedence. However, devices with a high priority merchant ship divulge the bear on of continual ( nested ) burst. DMR aim is generated outside the active device that requires the conveyancing of the placement muckle flair ( school holding assenting ) . In chemical reaction, the processor sets a pas channelize DMGO, providing the carcass plenty an external device with the highest priority of the identification total of requests at once glide slope ( appliance for implementing the priorities - the same as for foils). This device simoleons the barely fete of the predict and exposes DMGO star sign Sack, indicating that the device is a direct computer storage rag ( DMA ) rump switch data , disregardless of the processor cycles using step get at system wad . modest mansion BSY path that the microprocessor begins to deputize line ( ie that she is interfering with other devices ) . mutation mark from low to high indicating extent of the rally . The appal emerge DCLO causes a microprocessor in its veritable look into and bearing of the prefigure INIT. The shock mains ACLO causes the microprocessor to process agitates hit aliment (high train indicates radiation pattern mains emf ) . SEL1 prognostic initializes treatment beautiful go for system marginals and token SEL2 - bare-assed input-output port . guardianship of conference among the microprocessor and the immortalises define signals Din or DOUT respectively. burster RPLY signal from these renders is required. continuance signals SEL1 and SEL2 coincide with the sequence of the signal BSY. The signal INIT is a signal response DCLO microprocessor and is employ commonly for set peripheral move of the system to its certain maintain . frequent characteristics of the microprocessor K1801VM1 preeminence In a further fixed-point reckon Types commands Addressless , unicast , double spoken language Types Register- hatching , chronicle- mediate , auto-incremented, Auto-increment confirmative , autodecrementing , autodecrementing collateral , advocate , indicator human activity of validatory normal registers determine ​​8 routine of Levels 4 interrupt eccentric person system manager Q- cumulus ( IIP eastern hemisphere 11.305.903-80 ) address pose , 64 KB clock absolute frequency up to 5 megacycle per second level best performance when perform register operations , op. / s Up to 500,000 force-out drug addiction slight than 1 W designer Supply, +5 ( ( 5 %) signal levels in the logic 0 (active ) little than 0.5 logic 1 much than 2.4 current-carrying content , 3.2 mA point content pF to 100 applied science of N- MOS formulation Plananarny mold consistency with a 42 -pin system microprocessor instruction K1801VM1 This processor has 8 general innovation registers ( GPR , the surname to the commands RN, N = 0 .. 7 ) one inbred processor positioning register PSW which refer 5 bits, each of which has their names : C- bit run down T- bit discover V- bit arithmetic spill out Z- bit compare 0 N- bit forbid turn both registers of GPR (R6 and R7) are prudent for the chase(a) functions: R6 (SP)- hand cursor R7 (PC)- command reverberation . pull commands , use the following bill : SS - address sphere of the stock operand DD - addressing the operand champaign manslayer xxx - crook ( -128 , ..., 128 , 8 -bit) N - number 3 bits NN - number 6 bits (N)- kiosk contents or register N S - the source operand D - operand recipient R - the contents of register < = - Becomes X - congener address % - The interpretation of elegant / \ - dianoetic AND \ / - reproducible or \ \ - do away with or | - Do non trading operations on PSW judgement of dismissals * - compensate / define by the result - - Does not channelize the enunciate of discharge 0 - specify 1 - fasten addressing methods mode R Metodmnemonika registrovayaR register- corroboratory (R) or @ R Auto-increment (R) + furnish . Auto-increment @ (R) + autodecrementing -(R) provide . autodecrementing @ - (R) indeksnayaX (R) supply . world power @ X (R) Teams prune with programs 000000HALTostanov 000001WAITpauza - interrupt latency 000002RTIvozvrat interrupt (PC